In this paper, we propose a cost-effective reconfigurable accelerator for the platform-based system-on-a-chip (SoC) design. Based on the proposed design methodology, the reconfigurable computation array (RCA) can be landed with the features of high usage rate and low hardware cost without sacrificing multimedia computation performance. The RCA consisting of 8 type 1 grouped processing elements (GPE1’s), 3 GPE2’s and 1 GPE3 is capable of configuring two 16x16-bit multiplication, eight 8x8 multiplication, and sixteen 8-bit absolute operations in different connection topologies. Via the cost-effective RCA, the number of GPEs can be saved up to 25 % and the usage rates of the RCA compared with that of [8] for motion estimation (ME), RGB2YUV and...
In today’s world, people are widely using technology to make their lives more comfortable and better...
Over the last decade, Graphics Processing Unit (GPU) architectures have evolved from a fixed-functio...
With the continued progress in VLSI technologies, we can integrate numerous cores in a single billio...
Us have evolved to programmable, energy efficient compute accelerators for massively parallel applic...
GPUs have evolved to programmable, energy efficient com-pute accelerators for massively parallel app...
Hardware accelerators have become permanent features in the post-Dennard computing landscape, displa...
The subject of this work is the design and the implementation of hardware components which can accel...
Advancements in silicon processing are responsible for the exponential growth in computing performan...
The saturation of single-thread performance, along with the advent of the power wall, has resulted i...
Fast and energy efficient processing of data has always been a key requirement in processor design. ...
The performance of a platform is evaluated based on its ability to deal with the processing of multi...
Dynamically reconfigurable processors are attracting significant interest in the semiconductor indus...
In this work, a hybrid CPU/accelerator platform, which runs a standard operating system, is proto-ty...
\u3cp\u3eOver the last decade, Graphics Processing Unit (GPU) architectures have evolved from a fixe...
In this paper, a novel reconfigurable computing engine for digi-tal signal processing applications i...
In today’s world, people are widely using technology to make their lives more comfortable and better...
Over the last decade, Graphics Processing Unit (GPU) architectures have evolved from a fixed-functio...
With the continued progress in VLSI technologies, we can integrate numerous cores in a single billio...
Us have evolved to programmable, energy efficient compute accelerators for massively parallel applic...
GPUs have evolved to programmable, energy efficient com-pute accelerators for massively parallel app...
Hardware accelerators have become permanent features in the post-Dennard computing landscape, displa...
The subject of this work is the design and the implementation of hardware components which can accel...
Advancements in silicon processing are responsible for the exponential growth in computing performan...
The saturation of single-thread performance, along with the advent of the power wall, has resulted i...
Fast and energy efficient processing of data has always been a key requirement in processor design. ...
The performance of a platform is evaluated based on its ability to deal with the processing of multi...
Dynamically reconfigurable processors are attracting significant interest in the semiconductor indus...
In this work, a hybrid CPU/accelerator platform, which runs a standard operating system, is proto-ty...
\u3cp\u3eOver the last decade, Graphics Processing Unit (GPU) architectures have evolved from a fixe...
In this paper, a novel reconfigurable computing engine for digi-tal signal processing applications i...
In today’s world, people are widely using technology to make their lives more comfortable and better...
Over the last decade, Graphics Processing Unit (GPU) architectures have evolved from a fixed-functio...
With the continued progress in VLSI technologies, we can integrate numerous cores in a single billio...