LINEARITY RESTRICTIONS FOR A CLASS OF PHASE FREQUENCY DETECTORS

In this paper, the transfer characteristic of a class of phase frequency detectors is analysed and modelled for simulations. It is demonstrated that the reasons of non-linearity of the transfer characteristic may originate both from the charge pump and the logic control unit of the phase frequency detector. Restricted slew rate is found to be one of the main reasons of non-linearity of the charge pump, determining the minimum duration of control signals. For a generalized structure of the control unit, an optimum distribution of gate delays is proposed. Also, some critical aspects of selecting the delays are considered which may cause significant non-linearity with a dead zone and even oscillation of the phase frequency detector. The results of the analysis are verified by transistor level SPICE simulation. Key words: phase frequency detector, charge pump, gate delay, transfer characteristic, dead zone