Image Processing with CMOL Circuits

We have analyzed two options of using hybrid CMOS/nanodevice circuits with area-distributed (“CMOL”) interface for the low-level image processing tasks, on the simplest example of 2D image con-volution with a sizable filter window. The first option is to use digital, DSP-like circuits based on a reconfigurable CMOL fabric, while the second one is based on mixed-signal CMOL circuits with the analog presentation of input and output data and the binary pre-sentation of the filter function. Estimates of the circuit performance have been carried out for the 45-nm CMOS technology and the 4.5-nm nanowire half-pitch, and the power consumption fixed at a man-ageable level. In the digital case, the circuit area per pixel is about 25×25 µm2, and the time necessaryfor convolving a 1,024×1,024-pixel, 12-bit-accurate image with a 32×32-pixel window function of similar accuracy is close to 25 µs, much shorter than that esti-mated for purely CMOS circuits with the same minimum feature size. For the mixed-signal CMOL circuit, the corresponding num-bers are much better ( ∼ 1 µm2 and 1 µs, respectively), but this option requires a very high (∼1%) reproducibility of ON currents of the necessary crosspoint devices (programmable diodes), which has not yet been reached experimentally. 1