Versatile Tiled-Processor Architectures: The Raw Approach

Recent advances in VLSI technology have created an increasing interest within the computer architecture community to build a new kind of “general purpose ” processor that is able to run a broad class of applications including primarily those from the domain of embedded systems—graphics, wireless processing, networking, and various forms of signal processing. The interest in new architectures is compounded by a growing wire delay concern which limits the distance that information can travel in a single clock cycle. The realities of interconnect delay—and power consumption— seriously challenge the ability of microprocessor designers to fulfill the promise of Moore’s Law. As a result, new architecture designs are largely centered around scalable and distributed alternatives to current centralized microprocessor designs