Add to ORKGIn this work, the design and implementation of a low power ternary full adder are presented in CMOS technology. In a ternary full adder design, the basic building blocks, the positive ternary inverter (PTI) and negative ternary inverter (NTI) are developed using a CMOS inverter and pass transistors. In designs of PTI and NTI, W/L ratios of transistors have been varied for their optimum performance. The ternary full adder and its building blocks have been simulated with SPICE 2G.6 using the MOSIS model parameters. The rise and fall times of PTI show an improvement by a factor of 14 and 4, respectively, and that of the NTI by a factor of nearly 4 and 17, respectively over that of earlier designs implemented in depletion-enhancement CMOS (DECM...
This work presents comparison of ternary combinational digital circuits that reduce energy consumpti...
Key building blocks – simple ternary inverter, positive ternary inverter and negative ternary invert...
The design of balanced ternary digital logic circuits based on memristors and conventional CMOS devi...
In this work, the design and implementation of a low power ternary full adder are presented in CMOS ...
Three valued logic which is also called as a ternary logic is a best alternative to conventional bin...
With the progression of information technology, there has been a burgeoning demand for processing vo...
The history of ternary adders goes back to more than six decades ago. Since then, a multitude of ter...
With the increase in device integration level and the growth in complexity of Integrated circuits, s...
We propose the feasible and scalable ternary CMOS (T-CMOS) device platform for a fully CMOS-compatib...
Over the last few decades, CMOS-based digital circuits have been steadily developed. However, becaus...
In present work two new designs for single bit full adders have been presented using three transisto...
The 20th century is an era of rapid development of IC. The rapid development of information industry...
Multiple-Valued Logic systems present significant improvements in terms of energy consumption over b...
This study explores the suitability of dynamic logic style in ternary logic. It presents high-perfor...
We demonstrate ternary CMOS (T-CMOS)-based standard ternary inverter (STI) for compact and powerscal...
This work presents comparison of ternary combinational digital circuits that reduce energy consumpti...
Key building blocks – simple ternary inverter, positive ternary inverter and negative ternary invert...
The design of balanced ternary digital logic circuits based on memristors and conventional CMOS devi...
In this work, the design and implementation of a low power ternary full adder are presented in CMOS ...
Three valued logic which is also called as a ternary logic is a best alternative to conventional bin...
With the progression of information technology, there has been a burgeoning demand for processing vo...
The history of ternary adders goes back to more than six decades ago. Since then, a multitude of ter...
With the increase in device integration level and the growth in complexity of Integrated circuits, s...
We propose the feasible and scalable ternary CMOS (T-CMOS) device platform for a fully CMOS-compatib...
Over the last few decades, CMOS-based digital circuits have been steadily developed. However, becaus...
In present work two new designs for single bit full adders have been presented using three transisto...
The 20th century is an era of rapid development of IC. The rapid development of information industry...
Multiple-Valued Logic systems present significant improvements in terms of energy consumption over b...
This study explores the suitability of dynamic logic style in ternary logic. It presents high-perfor...
We demonstrate ternary CMOS (T-CMOS)-based standard ternary inverter (STI) for compact and powerscal...
This work presents comparison of ternary combinational digital circuits that reduce energy consumpti...
Key building blocks – simple ternary inverter, positive ternary inverter and negative ternary invert...
The design of balanced ternary digital logic circuits based on memristors and conventional CMOS devi...