On the Effectiveness of Runtime Resource Reconfiguration Exploiting Program Behavior in Superscalar Microprocessor

Current day research in microprocessor architecture targeted for high throughput and performance cannot be decoupled from power management issues. Complex applications impose more computation load on the processing engines which in turn consume more power. Power budget restrict implementation of such compute intensive application on mobile devices for its limited storage of energy. The total energy spent during the execution is the primary concern for the devices which are driven by battery or other alternative source of limited storage of energy. On the other hand, servers and desktops are concerned about the rate at which the energy is dissipated, i.e., power. Higher power dissipation makes cooling a dicult task. Thermal runway problem associated with the reliability issue make hardware design a challenge. It is therefore necessary to address power dissipation along with the performance estimation early in the design stage to validate a particular design. In order to maintain a balance between performance requirement and energy (power) dis-sipation, a fast and near accurate evaluation of the entire design space is necessary at very early level of design (e.g., micro-architecture level). This thesis addresses issues relate