Execution schemes for dynamically reconfigurable architectures

Abstract — Mapping applications onto reconfigurable architectures can be done in many different ways. The features of the target architecture constrain the way an application can be mapped and executed significantly. Execution schemes are generated as an intermediate format in our approach to application mapping and con-stitute a useful level to compare features of different ar-chitectures. This paper describes how we establish ex-ecution schemes for coarse grained dynamically recon-figurable architectures and presents area, timing, and gate-level power estimations derived from a synthesized architecture model. I