Achieving Complexity and Reliability on Unreliable Platforms

As the density of electronic devices increases, traditional design techniques fail to fully utilise the expanding resource. How can the design community utilise the design capacity that technology is offering and at the same time ensure its correct-ness? A further problem facing the design community is that yield rates are falling due to the increasing complexity of modern chips. How can we improve yield rates whilst achieving even more complex chips? This paper presents our approach to the problem of achieving complex and re-liable designs. First we consider our approach with respect to one of today’s tech-nologies, Field Programmable Gate Arrays, and present our current results. We then present our ideas with respect to solutions to this problem based on future distributed technologies.