3Gb/s CMOS Adaptive Equalizer for Backplane Serial Links

Abstract – A new line equalizer is proposed for the appli-cation of backplane serial link. The equalizer is made of digitally controlled feed-forward equalizer (DCFFE), bottom detector, limiting amplifier and control block. The control block is capable of detecting signal shapes and decides the high frequency boosting level of DCFFE. Successful equalization is demonstrated for signals trans-mitted over 2m long PCB trace (about 10dB loss). The circuit is designed with CMOS 0.18 ㎛ fabrication process and verified with SPICE simulation