Where oop falls short of hardware verification needs

Functional verification requires, among other things, dedicated programming constructs and mechanisms. Such are accessible to a wide community of verification engineers today more than in the past thanks to the SystemVerilog language. Along with many verification specific constructs it features object-oriented programming (OOP) framework. OOP has been extremely successful in facilitating reuse in many software application domains. This observation suggests that it should serve just as well for reuse in the verification domain. The present paper critically examines this supposition. It demonstrates issues with the naive application of object-oriented mechanisms, and how they are partially overcome by more sophisticated design techniques. Still these techniques don't scale well and increase code complexity. The same needs are shown to be met more naturally with modularization mechanisms that go beyond strict OOP. This analysis leads to an interesting observation on the nature of reuse in verification. It turns out to differ substantially from that of classical software application domains. If hardware verification languages are to address the challenges of creating reusable verification code, they must accommodate for its unique character