Hardware Design and Implementation of a Network-on-Chip Based High Performance Crossbar Switch Fabric

High-performance routers have the task of transmitting traffic in be-tween the nodes of the Internet, the network of networks that carries the vast amount of information among billions of users. The switch fabric is the key building block of every router, and various switch fabric architectures are used in the market products. The crossbar-based switch fabric architectures (both buffered and unbuffered) of-fer very high performances and are widely used for high-performance routers. However their cost grows quadratically with the input/out-put port count, since they require internal crosspoints (and buffers) for every input/output port pair. Recently, a functional-level design of two novel Network-on-Chip based switch fabric architectures was proposed, Unidirectional NoC (UDN) and Multidirectional NoC (MDN), as a replacement of the buffered crossbar switch fabric architecture. In this thesis, we pro-pose the hardware design and implementation of the aforementione