Implementing Learning on the SpiNNaker Universal Neural Chip Multiprocessor

Abstract. Large-scale neural simulation virtually necessitates dedicated hardware with on-chip learning. Using SpiNNaker, a universal neural network chip multiprocessor, we demonstrate an STDP implementation as an example of programmable on-chip learning for dedicated neural hardware. By using a pre-synaptic sensitive scheme, we optimize both the data representation and processing for efficiency of implementation. The deferred-event model we developed provides a reconfigurable length of timing records to meet different requirements of accuracy. Results demonstrate successful STDP within a multi-chip simulation containing 60 neurons and 240 synapses. This optimisable learning model illustrates scalable general-purpose techniques essential for developing functional learning rules on general-purpose, parallel neural hardware