System-level power estimation using an on-chip bus performance monitoring unit

In this paper we propose an on-chip bus PMU which makes ac-curate estimates of system power consumption from a first-order linear power model by utilizing system-level activity information exchanged on the on-chip bus. It can easily be customized for dif-ferent on-chip and off-chip memory devices, and is not dependent on a specific CPU core. We model memory devices using energy state machines, describe them in XML, and use that description au-tomatic synthesis of the PMU. We compare the short-term accuracy of the proposed PMU with a cycle-accurate system-level power es-timator, and assess its long-term accuracy with a real hardware pro-totype. Experimental results show that the the power estimation deviates less than 5 % from real measurements. 1