Abstract-The evolution of integrated circuit technology is causing system designs to move towards communication-based architectures. However, metallic interconnect networks can be very costly in terms of power and silicon area and can thus become a bottleneck in system on chip design. Integrated optical interconnect has been identified by the ITRS as a potential solution to overcome predicted interconnect limitations. This paper firstly presents the technological and device aspects of integrated optical interconnect for on-chip data transport. The second part of the paper concentrates on simulation-based quantitative comparisons of electrical to optical interconnect at the physical link level, and it is demonstrated that a ten-fold reductio...
Continued device scaling enables microprocessors and other systems-on-chip (SoCs) to increase their ...
This paper describes a complete technology family for parallel optical interconnect systems. Key fea...
This paper addresses some fundamental issues relating to the design of systems on chip that utilize ...
The evolution of integrated circuit technology is causing system designs to move towards communicati...
Throughput, power consumption, signal integrity, pin count and routing complexity are all increasing...
Electrical interconnects are becoming a bottleneck in the way towards meeting future performance req...
The various arguments for introducing optical interconnections to silicon CMOS chips are summarized,...
Interconnect has become a primary bottleneck in integrated circuit design. As CMOS technology is sca...
This book provides a broad overview of current research in optical interconnect technologies and arc...
Optical interconnect is claimed to have signi¯cant advantages over electrical interconnect due to th...
The CMOS IC industry thrives on the down-scaling drive for ever smaller transistors, leading to fast...
This paper discusses short-distance optical interconnects for general-purpose distributed digital sy...
Abstract—Intrachip optical interconnects(OIs) have the pote-ntial to outperform electrical wires and...
Chip I/O pins are an increasingly limited resource and significantly affect the performance, power a...
Super computing is reaching out to ExaFLOP processing speeds, creating fundamental challenges for th...
Continued device scaling enables microprocessors and other systems-on-chip (SoCs) to increase their ...
This paper describes a complete technology family for parallel optical interconnect systems. Key fea...
This paper addresses some fundamental issues relating to the design of systems on chip that utilize ...
The evolution of integrated circuit technology is causing system designs to move towards communicati...
Throughput, power consumption, signal integrity, pin count and routing complexity are all increasing...
Electrical interconnects are becoming a bottleneck in the way towards meeting future performance req...
The various arguments for introducing optical interconnections to silicon CMOS chips are summarized,...
Interconnect has become a primary bottleneck in integrated circuit design. As CMOS technology is sca...
This book provides a broad overview of current research in optical interconnect technologies and arc...
Optical interconnect is claimed to have signi¯cant advantages over electrical interconnect due to th...
The CMOS IC industry thrives on the down-scaling drive for ever smaller transistors, leading to fast...
This paper discusses short-distance optical interconnects for general-purpose distributed digital sy...
Abstract—Intrachip optical interconnects(OIs) have the pote-ntial to outperform electrical wires and...
Chip I/O pins are an increasingly limited resource and significantly affect the performance, power a...
Super computing is reaching out to ExaFLOP processing speeds, creating fundamental challenges for th...
Continued device scaling enables microprocessors and other systems-on-chip (SoCs) to increase their ...
This paper describes a complete technology family for parallel optical interconnect systems. Key fea...
This paper addresses some fundamental issues relating to the design of systems on chip that utilize ...