Investigating cache parameters of x86 family processors

Abstract. The excellent performance of the contemporary x86 proces-sors is partially due to the complexity of their memory architecture, which therefore plays a role in performance engineering efforts. Unfortu-nately, the detailed parameters of the memory architecture are often not easily available, which makes it difficult to design experiments and eval-uate results when the memory architecture is involved. To remedy this lack of information, we present experiments that investigate detailed pa-rameters of the memory architecture, focusing on such information that is typically not available elsewhere.