Abstract:-A novel high and low speed output buffer circuit is proposed for Universal Serial Bus (USB) interface applications. Operation principles of this novel buffer are developed based on slew rate control and delayed turn-on technique. The mechanism for slew rate control is process variation self compensating. So, both precise rise and fall times of the output signal have been obtained for low speed operation. Moreover, the pull-up and pull-down output drivers are divided into several sub-drivers in parallel with the delayed turn-on characteristics. Therefore, the change of rate of di/dt decreases. And the simultaneous switching noise, based on simulations, are reduced from maximum overshoot 3.47V to 3.36V and maximum undershoot from-0....
[[abstract]]Two types of low-power, high-speed, but with a large input dynamic range and output swin...
[[abstract]]A compact high-speed low-power rail-to-rail buffer amplifier, which is suitable for driv...
Abstract-- This paper proposes an approach to reduce the short circuit current of CMOS off-chip driv...
A new output buffer design for low switching noise and load adaptability is presented. Instead of us...
A new output buffer design for low switching noise and load adaptability is presented. Instead of us...
In this paper, a new CMOS output buffer with low switching noise and load adaptability is presented....
In this paper, a new CMOS output buffer with low switching noise and load adaptability is presented....
The thesis deals with circuit-level aspects of CMOS buffer SRAMs where the data throughput rate is a...
A power-efficient low-voltage buffer is presented. The proposed buffer contains a low-frequency zero...
[[abstract]]Two types of low-power, high-speed, but with a large input dynamic range and output swin...
[[abstract]]Decreased power dissipation and transient voltage drops in CMOS power distribution netwo...
A rail-to-rail class-AB CMOS buffer is proposed in this paper to drive large capacitive loads. A new...
Abstract: Buffers are widely employed in digital circuits where high speed signals are used. In this...
Low-power analog driver based on a single-stage amplifier with an embedded current-detection slew-ra...
rail-to-rail class-AB analog buffers are examined. Their analysis reveals that the output current dr...
[[abstract]]Two types of low-power, high-speed, but with a large input dynamic range and output swin...
[[abstract]]A compact high-speed low-power rail-to-rail buffer amplifier, which is suitable for driv...
Abstract-- This paper proposes an approach to reduce the short circuit current of CMOS off-chip driv...
A new output buffer design for low switching noise and load adaptability is presented. Instead of us...
A new output buffer design for low switching noise and load adaptability is presented. Instead of us...
In this paper, a new CMOS output buffer with low switching noise and load adaptability is presented....
In this paper, a new CMOS output buffer with low switching noise and load adaptability is presented....
The thesis deals with circuit-level aspects of CMOS buffer SRAMs where the data throughput rate is a...
A power-efficient low-voltage buffer is presented. The proposed buffer contains a low-frequency zero...
[[abstract]]Two types of low-power, high-speed, but with a large input dynamic range and output swin...
[[abstract]]Decreased power dissipation and transient voltage drops in CMOS power distribution netwo...
A rail-to-rail class-AB CMOS buffer is proposed in this paper to drive large capacitive loads. A new...
Abstract: Buffers are widely employed in digital circuits where high speed signals are used. In this...
Low-power analog driver based on a single-stage amplifier with an embedded current-detection slew-ra...
rail-to-rail class-AB analog buffers are examined. Their analysis reveals that the output current dr...
[[abstract]]Two types of low-power, high-speed, but with a large input dynamic range and output swin...
[[abstract]]A compact high-speed low-power rail-to-rail buffer amplifier, which is suitable for driv...
Abstract-- This paper proposes an approach to reduce the short circuit current of CMOS off-chip driv...