Tamper Resistance Mechanisms for Secure, Embedded Systems

Security is a concern in the design of a wide range of embedded sys-tems. Extensive research has been devoted to the development of cryptographic algorithms that provide the theoretical underpinnings of information security. Functional security mechanisms, such as se-curity protocols, suitably employ these mathematical primitives in order to achieve the desired security objectives. However, functional security mechanisms alone cannot ensure security, since most em-bedded systems present attackers with an abundance of opportunities to observe or interfere with their implementation, and hence to com-promise their theoretical strength. This paper surveys various tamper or attack techniques, and ex-plains how they can be used to undermine or weaken security func-tions in embedded systems. Tamper-resistant design refers to the pro-cess of designing a system architecture and implementation that is resistant to such attacks. We outline approaches that have been pro-posed to design tamper-resistant embedded systems, with examples drawn from recent commercial products.