SoC-C: Efficient Programming Abstractions for Heterogeneous Multicore Systems on Chip

The architectures of system-on-chip (SoC) platforms found in high-end consumer devices are getting more and more complex as designers strive to deliver increasingly compute-intensive ap-plications on near-constant energy budgets. Workloads running on these platforms require the exploitation of heterogeneous par-allelism and increasingly irregular memory hierarchies. The con-ventional approach to programming such hardware is very low-level but this yields software which is intimately and inseparably tied to the details of the platform it was originally designed for, limiting the software’s portability, and, ultimately, the architec-tural choices available to designers of future platform generations. The key insight of this paper is that many of the problems experi-enced in mapping applications onto SoC platforms come not from deciding how to map a program onto the hardware but from the need to restructure the program and the number of interdepen-dencies introduced in the process of implementing those decisions. We tackle this complexity with a set of language extensions which allows the programmer to introduce pipeline parallelism into se-quential programs, manage distributed memories, and express the desired mapping of tasks to resources. The compiler takes care of the complex, error-prone details required to implement that mapping. We demonstrate the effectiveness of SoC-C and its compiler with a “software defined radio ” example (the PHY layer of a Digital Video Broadcast receiver) achieving a 3.4x speedup on 4 cores