Transceiver for Reconfigurable Multiple Access Chip-to-Chip Communication

A scalable frequency-division multiple access interconnect (FDMA-I) system is proposed to enable reconfigurable and bi-directional multiple I/O chip-to-chip communications. By trans-mitting signals using N-orthogonal frequency channels, this FDMA-I achieves simultaneous multi-chip access capability between NxN I/Os on a shared bus by selectively switching vari-ous frequency bands, resulting in channel concurrency and recon-figurability. In the past, CDMA techniques have been applied in serial links [1,2] and bus architectures [3,4] to achieve a flexible communica-tion network. However, ISI makes it difficult to increase the data rate for these schemes. FDMA-I, on the other hand, can achieve the same flexible and reconfigurable I/O network with high aggregate data rate by slowing down the data rate on each of the RF carriers while increasing the number of RF carriers, resultin