Add to ORKGIn this paper, we describe the design of on-chip repeaterless interconnects with nearly speed-of-light latency. Sharp current-pulse data transmission is used to modulate transmitter energy to higher frequencies, where the effect of wire inductance is max-imized, allowing the on-chip wires to function as transmission lines with considerably reduced dispersion. A prototype 8 Gbps serial link employing this pulsed current-mode signalling in a 0.18 m CMOS process is described and measured
Global on-chip data communication is becoming a concern as the gap between transistor speed and inte...
As feature sizes progress into nanometer realms, on-chip interconnects play an increasing role in th...
As technology scales, interconnect planning has been widely regarded as one of the most critical fac...
Abstract—In this paper, we describe the design of on-chip re-peater-less interconnects with nearly s...
The propagation limits of electrical signals for systems built with conventional silicon processing ...
Abstract—An asynchronous high-speed wave-pipelined bit-se-rial link for on-chip communication is pre...
As VLSI progresses into Very Deep Submicron (VDSM) realms, global interconnects play an increasingly...
Abstract—Pulse-based data transmission has been demon-strated as a power-saving and high performance...
Global on-chip interconnects are a limiting factor in modern high performance VLSI systems due to cr...
Abstract—This paper describes a novel global on-chip interconnect scheme, in which a one UI-delayed ...
Abstract—We propose a novel cost-effective long-range NoC in-terconnect design based on current-mode...
High-performance long-range NoC link enables efficient implementation of network-on-chip topologies ...
We propose circuits for low power high throughput multilevel current mode signaling using 2 bit simu...
A bidirectional serial link on-chip implementation is going to be assessed so as to set the option o...
Abstract—This paper presents a set of circuit techniques to achieve high data rate point-to-point co...
Global on-chip data communication is becoming a concern as the gap between transistor speed and inte...
As feature sizes progress into nanometer realms, on-chip interconnects play an increasing role in th...
As technology scales, interconnect planning has been widely regarded as one of the most critical fac...
Abstract—In this paper, we describe the design of on-chip re-peater-less interconnects with nearly s...
The propagation limits of electrical signals for systems built with conventional silicon processing ...
Abstract—An asynchronous high-speed wave-pipelined bit-se-rial link for on-chip communication is pre...
As VLSI progresses into Very Deep Submicron (VDSM) realms, global interconnects play an increasingly...
Abstract—Pulse-based data transmission has been demon-strated as a power-saving and high performance...
Global on-chip interconnects are a limiting factor in modern high performance VLSI systems due to cr...
Abstract—This paper describes a novel global on-chip interconnect scheme, in which a one UI-delayed ...
Abstract—We propose a novel cost-effective long-range NoC in-terconnect design based on current-mode...
High-performance long-range NoC link enables efficient implementation of network-on-chip topologies ...
We propose circuits for low power high throughput multilevel current mode signaling using 2 bit simu...
A bidirectional serial link on-chip implementation is going to be assessed so as to set the option o...
Abstract—This paper presents a set of circuit techniques to achieve high data rate point-to-point co...
Global on-chip data communication is becoming a concern as the gap between transistor speed and inte...
As feature sizes progress into nanometer realms, on-chip interconnects play an increasing role in th...
As technology scales, interconnect planning has been widely regarded as one of the most critical fac...