Effective integration of advanced Systems-on-Chip (SoC) requires extensive reuse of IP modules as well as automation of the IP integration process, including verification. Key enablers for this are standards to describe and package IP modules. We focus on the IP-XACT standards and demonstrate how these standards are deployed in three industrial IP integration flows. Further, we report on two future extensions to IP-XACT that are currently being explored in the SPRINT project, i.e. IP-XACT based verification software generation and IP-XACT based configuration of debug environments. We conclude that IP-XACT is enabling powerful IP integration methodologies and that future extensions can further increase the effectiveness of IP-XACT standards....
This paper presents an innovative taxonomy for the classification of different strategies for the in...
Kactus2 is a toolset for designing embedded products, especially FPGA-based MP-SoCs. The aim is easi...
Abstract-As the design of SoC is getting more and more complicated, the IPs (Intellectual Property) ...
ISBN: 978-3-9810801-5-5International audienceWe are interested in the problem of improving ipreuse i...
Embedded systems are growing larger and more complex. Even now, current system designs can contain h...
International audienceIn this paper we present framework for the deployment of hardware IPs at high-...
International audienceThe IP-Xact formalism (IEEE 1685 standard), was introduced to help assemble IP...
International audienceThe Open Microprocessor systems Initiative was the first industry initiative t...
As both semiconductor technology and industry evolves, the need for robust methodologies and efficie...
Intellectual Property (IP) Reuse is one of the keys for System on a Chip (SoC) design productivity i...
This thesis work explains the IP-XACT standard that is used to describe components and designs insid...
This book describes the life cycle process of IP cores, from specification to production, including ...
Reuse of semiconductor IP modules is widely perceived as a means to overcome the design gap [1], ena...
The verification of digital intellectual property (IP) blocks has always been a challenge. Simple IP...
International audienceThis paper presents a framework which facilitates the parameterization and int...
This paper presents an innovative taxonomy for the classification of different strategies for the in...
Kactus2 is a toolset for designing embedded products, especially FPGA-based MP-SoCs. The aim is easi...
Abstract-As the design of SoC is getting more and more complicated, the IPs (Intellectual Property) ...
ISBN: 978-3-9810801-5-5International audienceWe are interested in the problem of improving ipreuse i...
Embedded systems are growing larger and more complex. Even now, current system designs can contain h...
International audienceIn this paper we present framework for the deployment of hardware IPs at high-...
International audienceThe IP-Xact formalism (IEEE 1685 standard), was introduced to help assemble IP...
International audienceThe Open Microprocessor systems Initiative was the first industry initiative t...
As both semiconductor technology and industry evolves, the need for robust methodologies and efficie...
Intellectual Property (IP) Reuse is one of the keys for System on a Chip (SoC) design productivity i...
This thesis work explains the IP-XACT standard that is used to describe components and designs insid...
This book describes the life cycle process of IP cores, from specification to production, including ...
Reuse of semiconductor IP modules is widely perceived as a means to overcome the design gap [1], ena...
The verification of digital intellectual property (IP) blocks has always been a challenge. Simple IP...
International audienceThis paper presents a framework which facilitates the parameterization and int...
This paper presents an innovative taxonomy for the classification of different strategies for the in...
Kactus2 is a toolset for designing embedded products, especially FPGA-based MP-SoCs. The aim is easi...
Abstract-As the design of SoC is getting more and more complicated, the IPs (Intellectual Property) ...